C8051F124-GQR Datasheet, PDF (1/350 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
Mixed Signal ISP Flash MCU Family
Analog Peripherals
- 10 or 12-bit SAR ADC
• ± 1 LSB INL
• Programmable throughput up to 100 ksps
• Up to 8 external inputs; programmable as single-
ended or differential
• Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5
• Data-dependent windowed interrupt generator
• Built-in temperature sensor
- 8-bit SAR ADC (‘F12x Only)
• Programmable throughput up to 500 ksps
• 8 external inputs (single-ended or differential)
• Programmable amplifier gain: 4, 2, 1, 0.5
- Two 12-bit DACs (‘F12x Only)
• Can synchronize outputs to timers for jitter-free wave-
form generation
- Two Analog Comparators
- Voltage Reference
- V_DD Monitor/Brown-Out Detector
On-Chip JTAG Debug & Boundary Scan
- On-chip debug circuitry facilitates full-speed, non-
intrusive in-circuit/in-system debugging
- Provides breakpoints, single-stepping, watchpoints,
stack monitor; inspect/modify memory and registers
- Superior performance to emulation systems using
ICE-chips, target pods, and sockets
- IEEE1149.1 compliant boundary scan
- Complete development kit
100-Pin TQFP or 64-Pin TQFP Packaging
- Temperature Range: –40 to +85 °C
- RoHS Available
High Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of
instruction set in 1 or 2 system clocks
- 100 MIPS or 50 MIPS throughput with on-chip PLL
- 2-cycle 16 x 16 MAC engine (C8051F120/1/2/3 and
C8051F130/1/2/3 only)
Memory
- 8448 bytes internal data RAM (8 k + 256)
- 128 or 64 kB Banked Flash; in-system programma-
ble in 1024-byte sectors
- External 64 kB data memory interface (programma-
ble multiplexed or non-multiplexed modes)
Digital Peripherals
- 8 byte-wide port I/O (100TQFP); 5 V tolerant
- 4 Byte-wide port I/O (64TQFP); 5 V tolerant
- Hardware SMBus™ (I2C™ Compatible), SPI™, and
two UART serial ports available concurrently
- Programmable 16-bit counter/timer array with
6 capture/compare modules
- 5 general purpose 16-bit counter/timers
- Dedicated watchdog timer; bi-directional reset pin
Clock Sources
- Internal precision oscillator: 24.5 MHz
- Flexible PLL technology
- External Oscillator: Crystal, RC, C, or clock
Voltage Supples
- Range: 2.7–3.6 V (50 MIPS) 3.0–3.6 V (100 MIPS)
- Power saving sleep and shutdown modes
ANALOG PERIPHERALS
VREF
PGA
10/12-bit
100ksps
ADC
+
+
-
-
VOLTAGE
COMPARATORS
TEMP
SENSOR
8-bit
PGA 500ksps
ADC
C8051F12x Only
12-Bit
DAC
12-Bit
DAC
DIGITAL I/O
UART0
UART1
SMBus
SPI Bus
Port 0
Port 1
Port 2
PCA
Timer 0
Timer 1
Timer 2
Timer 3
Timer 4
Port 3
Port 4
Port 5
Port 6
Port 7
64 pin 100 pin
HIGH-SPEED CONTROLLER CORE
8051 CPU 128/64 kB 8448 B 16 x 16 MAC
(50 or 100MIPS) ISP FLASH SRAM ('F120/1/2/3, 'F13x)
20
DEBUG CLOCK / PLL
INTERRUPTS CIRCUITRY CIRCUIT
JTAG
Preliminary Rev. 1.4 12/05
Copyright © 2005 by Silicon Laboratories
C8051F12x C8051F13x