C8051F124-GQR Datasheet, PDF (320/350 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
23.2.4. Toggle Output Mode (Timer 2 and Timer 4 Only)
Timers 2 and 4 have the capability to toggle the state of their respective output port pins (T2 or T4) to pro-
duce a 50% duty cycle waveform output. The port pin state will change upon the overflow or underflow of
the respective timer (depending on whether the timer is counting up or down). The toggle frequency is
determined by the clock source of the timer and the values loaded into RCAPnH and RCAPnL. When
counting DOWN, the auto-reload value for the timer is 0xFFFF, and underflow will occur when the value in
the timer matches the value stored in RCAPnH:RCAPnL. When counting UP, the auto-reload value for the
timer is RCAPnH:RCAPnL, and overflow will occur when the value in the timer transitions from 0xFFFF to
the reload value.
To output a square wave, the timer is placed in reload mode (the Capture/Reload Select Bit in TMRnCN
and the Timer/Counter Select Bit in TMRnCN are cleared to ‘0’). The timer output is enabled by setting the
Timer Output Enable Bit in TMRnCF to ‘1’. The timer should be configured via the timer clock source and
reload/underflow values such that the timer overflow/underflows at 1/2 the desired output frequency. The
port pin assigned by the crossbar as the timer’s output pin should be configured as a digital output (see
Section “18. Port Input/Output” on page 235). Setting the timer’s Run Bit (TRn) to ‘1’ will start the toggle
of the pin. A Read/Write of the Timer’s Toggle Output State Bit (TMRnCF.2) is used to read the state of the
toggle output, or to force a value of the output. This is useful when it is desired to start the toggle of a pin in
a known state, or to force the pin into a desired state when the toggle mode is halted.
Equation 23.1. Square Wave Frequency (Timer 2 and Timer 4 Only)
F_sq
=
-------------------^F----^T---^C----^L---^K---------------------
2  65536 – RCAPn
320
Rev. 1.4