C8051F124-GQR Datasheet, PDF (153/350 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
SFR Definition 11.10. ACC: Accumulator
R/W
ACC.7
Bit7
R/W
ACC.6
Bit6
R/W
ACC.5
Bit5
R/W
ACC.4
Bit4
R/W
ACC.3
Bit3
R/W
ACC.2
Bit2
R/W
ACC.1
Bit1
R/W Reset Value
ACC.0 00000000
Bit0
Bit
Addressable
SFR Address: 0xE0
SFR Page: All Pages
Bits7–0: ACC: Accumulator.
This register is the accumulator for arithmetic operations.
SFR Definition 11.11. B: B Register
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W Reset Value
B.7
B.6
B.5
B.4
B.3
B.2
B.1
B.0 00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Bit
Addressable
SFR Address: 0xF0
SFR Page: All Pages
Bits7–0: B: B Register.
This register serves as a second accumulator for certain arithmetic operations.
Rev. 1.4
153