C8051F124-GQR Datasheet, PDF (316/350 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
SFR Definition 23.5. TL1: Timer 1 Low Byte
R/W
R/W
R/W
R/W
R/W
R/W
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bits 7–0: TL1: Timer 1 Low Byte.
The TL1 register is the low byte of the 16-bit Timer 1.
R/W
R/W Reset Value
00000000
Bit1
Bit0
SFR Address: 0x8B
SFR Page: ₀
SFR Definition 23.6. TH0: Timer 0 High Byte
R/W
R/W
R/W
R/W
R/W
R/W
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bits 7–0: TH0: Timer 0 High Byte.
The TH0 register is the high byte of the 16-bit Timer 0.
R/W
R/W Reset Value
00000000
Bit1
Bit0
SFR Address: 0x8C
SFR Page: ₀
SFR Definition 23.7. TH1: Timer 1 High Byte
R/W
R/W
R/W
R/W
R/W
R/W
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bits 7–0: TH1: Timer 1 High Byte.
The TH1 register is the high byte of the 16-bit Timer 1.
R/W
R/W Reset Value
00000000
Bit1
Bit0
SFR Address: 0x8D
SFR Page: ₀
316
Rev. 1.4