C8051F124-GQR Datasheet, PDF (83/350 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
10-bit ADC0 Data Word appears in the ADC0 Data Word Registers as follows:
ADC0H[1:0]:ADC0L[7:0], if AD0LJST = 0
(ADC0H[7:2] will be sign-extension of ADC0H.1 for a differential reading, otherwise
=
000000b).
ADC0H[7:0]:ADC0L[7:6], if AD0LJST = 1
(ADC0L[5:0] = 00b).
Example: ADC0 Data Word Conversion Map, AIN0.0 Input in Single-Ended Mode
(AMX0CF = 0x00, AMX0SL = 0x00)
AIN0.0–AGND
(Volts)
VREF x (1023/1024)
VREF / 2
VREF x (511/1024)
0
ADC0H:ADC0L
(AD0LJST = 0)
0x03FF
0x0200
0x01FF
0x0000
ADC0H:ADC0L
(AD0LJST = 1)
0xFFC0
0x8000
0x7FC0
0x0000
Example: ADC0 Data Word Conversion Map, AIN0.0-AIN0.1 Differential Input Pair
(AMX0CF = 0x01, AMX0SL = 0x00)
AIN0.0–AIN0.1
(Volts)
VREF x (511/512)
VREF / 2
VREF x (1/512)
0
–VREF x (1/512)
–VREF / 2
–VREF
ADC0H:ADC0L
(AD0LJST = 0)
0x01FF
0x0100
0x0001
0x0000
0xFFFF (–1d)
0xFF00 (–256d)
0xFE00 (–512d)
ADC0H:ADC0L
(AD0LJST = 1)
0x7FC0
0x4000
0x0040
0x0000
0xFFC0
0xC000
0x8000
For AD0LJST = 0:
Code = Vin  --^G-----^a---ⁱ--ⁿ---  2ⁿ ; ‘n’ = 10 for Single-Ended; ‘n’= 9 for Differential.
VREF
Figure 6.5. ADC0 Data Word Example
Rev. 1.4
83