C8051F124-GQR Datasheet, PDF (65/350 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
12-bit ADC0 Data Word appears in the ADC0 Data Word Registers as follows:
ADC0H[3:0]:ADC0L[7:0], if AD0LJST = 0
(ADC0H[7:4] will be sign-extension of ADC0H.3 for a differential reading, otherwise
=
0000b).
ADC0H[7:0]:ADC0L[7:4], if AD0LJST = 1
(ADC0L[3:0] = 0000b).
Example: ADC0 Data Word Conversion Map, AIN0.0 Input in Single-Ended Mode
(AMX0CF = 0x00, AMX0SL = 0x00)
AIN0.0–AGND
(Volts)
VREF x (4095/4096)
VREF / 2
VREF x (2047/4096)
0
ADC0H:ADC0L
(AD0LJST = 0)
0x0FFF
0x0800
0x07FF
0x0000
ADC0H:ADC0L
(AD0LJST = 1)
0xFFF0
0x8000
0x7FF0
0x0000
Example: ADC0 Data Word Conversion Map, AIN0.0-AIN0.1 Differential Input Pair
(AMX0CF = 0x01, AMX0SL = 0x00)
AIN0.0–AIN0.1
(Volts)
VREF x (2047/2048)
VREF / 2
VREF x (1/2048)
0
–VREF x (1/2048)
–VREF / 2
–VREF
ADC0H:ADC0L
(AD0LJST = 0)
0x07FF
0x0400
0x0001
0x0000
0xFFFF (–1d)
0xFC00 (–1024d)
0xF800 (–2048d)
ADC0H:ADC0L
(AD0LJST = 1)
0x7FF0
0x4000
0x0010
0x0000
0xFFF0
0xC000
0x8000
For AD0LJST = 0:
Code = Vin  --^G-----^a---ⁱ--ⁿ---  2ⁿ ; ‘n’ = 12 for Single-Ended; ‘n’=11 for Differential.
VREF
Figure 5.5. ADC0 Data Word Example
Rev. 1.4
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