C8051F124-GQR Datasheet, PDF (347/350 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
25.3. Debug Support
Each MCU has on-chip JTAG and debug logic that provides non-intrusive, full speed, in-circuit debug sup-
port using the production part installed in the end application, via the four pin JTAG I/F. Silicon Labs' debug
system supports inspection and modification of memory and registers, breakpoints, and single stepping.
No additional target RAM, program memory, or communications channels are required. All the digital and
analog peripherals are functional and work correctly (remain synchronized) while debugging. The Watch-
dog Timer (WDT) is disabled when the MCU is halted during single stepping or at a breakpoint.
The C8051F120DK is a development kit with all the hardware and software necessary to develop applica-
tion code and perform in-circuit debug with each MCU in the C8051F12x and C8051F13x device families.
Each kit includes development software for the PC, a Serial Adapter (for connection to JTAG) and a target
application board with a C8051F120 installed. Serial cables and wall-mount power supply are also
included.
Rev. 1.4
347