C8051F124-GQR Datasheet, PDF (33/350 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
1.6. Programmable Counter Array
An on-board Programmable Counter/Timer Array (PCA) is included in addition to the five 16-bit general
purpose counter/timers. The PCA consists of a dedicated 16-bit counter/timer time base with 6 program-
mable capture/compare modules. The timebase is clocked from one of six sources: the system clock
divided by 12, the system clock divided by 4, Timer 0 overflow, an External Clock Input (ECI pin), the sys-
tem clock, or the external oscillator source divided by 8.
Each capture/compare module can be configured to operate in one of six modes: Edge-Triggered Capture,
Software Timer, High Speed Output, Frequency Output, 8-Bit Pulse Width Modulator, or 16-Bit Pulse Width
Modulator. The PCA Capture/Compare Module I/O and External Clock Input are routed to the MCU Port I/
O via the Digital Crossbar.
SYSCLK/12
SYSCLK/4
Timer 0 Overflow
ECI
SYSCLK
External Clock/8
PCA
CLOCK
MUX
16-Bit Counter/Timer
Capture/Compare
Module 0
Capture/Compare
Module 1
Capture/Compare
Module 2
Capture/Compare
Module 3
Capture/Compare
Module 4
Capture/Compare
Module 5
Crossbar
Port I/O
Figure 1.12. PCA Block Diagram
1.7. Serial Ports
Serial peripherals included on the devices are two Enhanced Full-Duplex UARTs, SPI Bus, and SMBus/
I2C. Each of the serial buses is fully implemented in hardware and makes extensive use of the CIP-51's
interrupts, thus requiring very little intervention by the CPU. The serial buses do not "share" resources
such as timers, interrupts, or Port I/O, so any or all of the serial buses may be used together with any other.
Rev. 1.4
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