C8051F124-GQR Datasheet, PDF (150/350 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
Table 11.3. Special Function Registers (Continued)
SFRs are listed in alphabetical order. All undefined SFR locations are reserved.
Register
TMR4L
WDTCN
Address
0xCC
0xFF
SFR
Page
Description
2 Timer/Counter 4 Low Byte
All Pages Watchdog Timer Control
XBR0
0xE1
F Port I/O Crossbar Control 0
XBR1
0xE2
F Port I/O Crossbar Control 1
XBR2
0xE3
F Port I/O Crossbar Control 2
Notes:
1. Refers to a register in the C8051F120/1/4/5 only.
2. Refers to a register in the C8051F122/3/6/7 and C8051F130/1/2/3 only.
3. Refers to a register in the C8051F120/1/2/3/4/5/6/7 only.
4. Refers to a register in the C8051F120/1/2/3 and C8051F130/1/2/3 only.
5. Refers to a register in the C8051F120/2/4/6 only.
6. Refers to a register in the C8051F121/3/5/7 only.
7. Refers to a register in the C8051F130/1/2/3 only.
Page No.
page 323
page 181
page 245
page 246
page 247
150
Rev. 1.4