C8051F124-GQR Datasheet, PDF (29/350 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
1.2. On-Chip Memory
The CIP-51 has a standard 8051 program and data address configuration. It includes 256 bytes of data
RAM, with the upper 128 bytes dual-mapped. Indirect addressing accesses the upper 128 bytes of general
purpose RAM, and direct addressing accesses the 128 byte SFR address space. The lower 128 bytes of
RAM are accessible via direct and indirect addressing. The first 32 bytes are addressable as four banks of
general purpose registers, and the next 16 bytes can be byte addressable or bit addressable.
The devices include an on-chip 8k byte RAM block and an external memory interface (EMIF) for accessing
off-chip data memory. The on-chip 8k byte block can be addressed over the entire 64k external data mem-
ory address range (overlapping 8k boundaries). External data memory address space can be mapped to
on-chip memory only, off-chip memory only, or a combination of the two (addresses up to 8k directed to on-
chip, above 8k directed to EMIF). The EMIF is also configurable for multiplexed or non-multiplexed
address/data lines.
On the C8051F12x and C8051F130/1, the MCU’s program memory consists of 128 k bytes of banked
Flash memory. The 1024 bytes from addresses 0x1FC00 to 0x1FFFF are reserved. On the C8051F132/3,
the MCU’s program memory consists of 64 k bytes of Flash memory. This memory may be reprogrammed
in-system in 1024 byte sectors, and requires no special off-chip programming voltage.
On all devices, there are also two 128 byte sectors at addresses 0x20000 to 0x200FF, which may be used
by software for data storage. See Figure 1.8 for the MCU system memory map.
PROGRAM/DATA MEMORY
(FLASH)
C8051F120/1/2/3/4/5/6/7
C8051F130/1
0x200FF
0x20000
0x1FFFF
0x1FC00
0x1FBFF
Scrachpad Memory
(DATA only)
RESERVED
FLASH
(In-System
Programmable in 1024
Byte Sectors)
0x00000
0x200FF
0x20000
C8051F132/3
Scrachpad Memory
(DATA only)
DATA MEMORY (RAM)
INTERNAL DATA ADDRESS SPACE
Upper 128 RAM
(Indirect Addressing
Only)
(Direct and Indirect
Addressing)
Bit Addressable
General Purpose
Registers
Special Function
Registers
(Direct Addressing Only)
0
1
2
3
Lower 128 RAM
(Direct and Indirect
Addressing)
Up To
256 SFR Pages
EXTERNAL DATA ADDRESS SPACE
0xFFFF
0x0FFFF
Off-chip XRAM space
FLASH
(In-System
Programmable in 1024
Byte Sectors)
0x00000
0x2000
0x1FFF
0x0000
XRAM - 8192 Bytes
(accessable using MOVX
instruction)
Figure 1.8. On-Chip Memory Map
Rev. 1.4
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