C8051F124-GQR Datasheet, PDF (232/350 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
17.6.2.3.8-bit MOVX with Bank Select: EMI0CF[4:2] = ‘010’.
ADDR[15:8]
P2/P6
AD[7:0]
P3/P7
ALE P0.5/P4.5
/WR P0.7/P4.7
/RD P0.6/P4.6
Muxed 8-bit WRITE with Bank Select
EMIF ADDRESS (8 MSBs) from EMI0CN
EMIF ADDRESS (8 LSBs) from
R0 or R1
T
ALEH
T
ALEL
EMIF WRITE DATA
T
ACS
T
WDS
T
ACW
T
WDH
T
ACH
ADDR[15:8]
P2/P6
AD[7:0]
P3/P7
ALE P0.5/P4.5
Muxed 8-bit READ with Bank Select
EMIF ADDRESS (8 MSBs) from EMI0CN
EMIF ADDRESS (8 LSBs) from
R0 or R1
T
ALEH
T
ALEL
EMIF READ DATA
T
RDS
T
RDH
P2/P6
P3/P7
P0.5/P4.5
P0.7/P4.7
P0.6/P4.6
P2/P6
P3/P7
P0.5/P4.5
/RD P0.6/P4.6
T
ACS
T
ACW
T
ACH
P0.6/P4.6
/WR P0.7/P4.7
P0.7/P4.7
Figure 17.9. Multiplexed 8-bit MOVX with Bank Select Timing
232
Rev. 1.4