M16C80 Datasheet, PDF (86/358 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/80 SERIES

M16C/80 Group
9. Interrupt Outline
Set the interrupt priority level to level 0
(Disable INT interrupt)
Set the polarity select bit
Clear the interrupt request bit to “0”
Set the interrupt priority level to level 1 to 7
(Enable the accepting of INT interrupt request)
______
Figure 9.12 Switching condition of INT interrupt request
(5) Rewrite the interrupt control register
• When a instruction to rewrite the interrupt control register is executed but the interrupt is disabled, the
interrupt request bit is not set sometimes even if the interrupt request for that register has been gener-
ated. This will depend on the instruction. If this creates problems, use the below instructions to change
the register.
Instructions : AND, OR, BCLR, BSET
• When attempting to clear the interrupt request bit of an interrupt control register, the interrupt request
bit is not cleared sometimes. This will depend on the instruction. If this creates problems, use the
below instructions to change the register.
Instructions : MOV
(6) Address match interrupt
• Do not set the following addresses to the address match interrupt register.
1. The address of the starting instruction in an interrupt routine.
2. Any of the next 7 instructions addresses immediately after an instruction to clear an interrupt request
bit of an interrupt control register or an instruction to rewrite an interrupt priority level to a smaller value.
3. Any of the next 3 instructions addresses immediately after an instruction to set the interrupt enable
flag (I flag).
4. Any of the next 3 instructions addresses immediately after an instruction to rewrite a processor inter-
rupt priority level (IPL) to a smaller value.
Rev.1.00 Aug. 02, 2005 ^{Page 75} of 329
REJ09B0187-0100