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M16C80 Datasheet, PDF (343/358 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/80 SERIES
M16C/80 Group
Version
Contents for change
REV.C
Three-phase PWM control register 1
Page 100 Line 1 In three-phase --> In "L" active output polarity in three-phase
Page 100 Line 26,31
the state of set by port direction register --> the high-impedance state
Page 101 Figure 73 Right: INV14 --> added
Page 103 Figure 74
Page 108 Table 32 UART4 LSB first/MSB first selection : Note 1 --> Note 2
Page 118 Figure 83 UART transmit/receive control register 2
Page 119 Figure UART 3,4 special mode register 3 --> added
Page 126 Line 3 CLK and CLKS select bit (bits 4 and 5 at address 037016) -->
port function select register (bits of related to-P64 and P65)
Page 145
Page 176 Table 124 P91: STxD3 output --> added
P97: STxD4 output --> added
Page 178 Figure 125-2 Function select register A3
Page 179 Figure 125-3 Function select register B0
Page 180 Figure 125-4 Function select register B3
Page 187 A/D Converter (5)
Page 188 DMAC
Page1
Supply voltage 4.0V-5.5V, Mask ROM version is added.
Page 5 Table 1.1.1 DMAC 2 channels --> 4 channels
Page 8
P0 description is changed
Page 9
P6 description is changed
P7, 8, 9, 10 equivalent to P0 --> P6
Page 10 Figure 1.2.1
M30800FC, M30803FG are added.
Page 18 Figure 1.4.3
(15) DRAM control register 0XXX0000 --> ?XXX????
Page 19 Figure 1.4.4
Delate Note, (143)-(147) 00 --> ??
Page 20 Figure 1.5.1
Add Note
Page 25 Figure 1.6.1 Processor mode register 1
When reset 0016 --> C016
Page 30 Line 15 ... output to A9 to A20 --> A8 to A20
Page 32 Figure 1.7.2
Page 35 (8) BCLK output
Page 38 Figure 1.7.6
Page 39 Figure 1.7.7
Page 40 Figure 1.8.1 and 1.8.2 Note
Page 42
Page 43 Figure 1.8.4
Page 44 Figure 1.8.5
Note 2, Line 6 Pin outputs "L" is delated.
Page 45
Page 47 Line 15
... as BCLK --> as BCLK from the interrupt routine
Table 1.8.3
Page 48 Status Transition of BCLK
Page 51 Figure 1.8.7
Page 52 Line 6, Figure 1.8.6
Delate D/A control register
Page 56 Line 14
C- 3
Revision History
Revision
date
'98.3.2
'98.4.12