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M16C80 Datasheet, PDF (101/358 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/80 SERIES
M16C/80 Group
11. DMAC
Precautions for DMAC
(1) Do not clear the DMA request bit of the DMAi request cause select register.
In M16C/80, when a DMA request is generated while the channel is disabled (Note), the DMA transfer is
not executed and the DMA request bit is cleared automatically.
Note :The DMA is disabled or the transfer count register is "0".
(2) When DMA transfer is done by a software trigger, set DSR and DRQ of the DMAi request cause select
register to "1" simultaneously using the OR instruction.
e.g.) OR.B #0A0h, DMiSL ; DMiSL is DMAi request cause select register
(3) When changing the DMAi request cause select bit of the DMAi request cause select register, set "1" to
the DMA request bit, simultaneously. In this case, set the corresponding DMA channel to disabled
before changing the DMAi request cause select bit. At least 26 cycles are needed from the instruction
to write to the DMAi request cause select register to enable DMA.
Example) When DMA request cause is changed to timer A0 and using DMA0 in single transfer after
DMA initial setting
push.w R0
; Store R0 register
stc
DMD0, R0
; Read DMA mode register 0
and.b
#11111100b, R0L ; Clear DMA0 transfer mode select bit to "00"
ldc
R0, DMD0
; DMA0 disabled
mov.b
#10000011b, DM0SL ; Select timer A0
; (Write "1" to DMA request bit simultaneously)
push.w R0
; Store R0 register
mov.w #6,R0
;
dummy_loop:
sbjnz.w
#1,R0,dummy_loop ; Dummy cycle
At least 26 cycles are needed
until DMA enabled.
pop.w
R0
; Restore R0 register
or.b
#00000001b, R0L ; Set DMA0 single transfer
ldc
R0, DMD0
; DMA0 enabled
pop.w
R0
; Restore R0 register
(4) Recommended procedure for starting DMA transfer
•When writing to the DMAi request cause register including overwriting the same value to the
DMAi request cause register;
1. Disable the corresponding channel i DMA in DMA mode registers 0 and 1.
2. Set up the peripheral used as the source of the DMA transfer. However, the peripheral
should remain disabled at this time. For example, when using UART0 transmit, disable
UART0 transmit.
3. Set the DMAi request cause select register. At this time, write a '1' to the DMA request
bit (bit 7)
Rev.1.00 Aug. 02, 2005 Page 90 of 329
REJ09B0187-0100