M16C80 Datasheet, PDF (141/358 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/80 SERIES

M16C/80 Group
16. Serial I/O
UARTi transmit/receive mode register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
UiMR(i=0,1)
Address
When reset
036016, 036816
0016
Bit
symbol
Bit name
SMD0 _{Serial I/O mode select bit}
SMD1
SMD2
Function
(During clock synchronous
serial I/O mode)
Must be fixed to 001
b2 b1 b0
0 0 0 : Serial I/O invalid
0 1 0 : Must not be set
0 1 1 : Must not be set
1 1 1 : Must not be set
Function
(During UART mode)
RW
b2 b1 b0
1 0 0 : Transfer data 7 bits long
1 0 1 : Transfer data 8 bits long
1 1 0 : Transfer data 9 bits long
0 0 0 : Serial I/O invalid
0 1 0 : Must not be set
0 1 1 : Must not be set
1 1 1 : Must not be set
CKDIR Internal/external clock
select bit
0 : Internal clock (Note 1) 0 : Internal clock
1 : External clock (Note 2) 1 : External clock (Note 2)
STPS _{Stop bit length select bit Invalid}
0 : One stop bit
1 : Two stop bits
PRY Odd/even parity select bit Invalid
Valid when bit 6 = “1”
0 : Odd parity
1 : Even parity
PRYE _{Parity enable bit}
Invalid
0 : Parity disabled
1 : Parity enabled
SLEP Sleep select bit
Set to “0”
0 : Sleep mode deselected
1 : Sleep mode selected
Note 1: Select CLK output by the corresponding function select registers A, B and C.
Note 2: Set the corresponding function select register A to the I/O port.
UARTi transmit/receive mode register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
UiMR (i=2 to 4)
Address
033816, 032816, 02F816
When reset
0016
Bit
symbol
Bit name
Function
(During clock synchronous
serial I/O mode)
SMD0 _{Serial I/O mode select bit}
SMD1
SMD2
Must be fixed to 001
b2 b1 b0
0 0 0 : Serial I/O invalid
0 1 0 : (Note)
0 1 1 : Must not be set
1 1 1 : Must not be set
Function
(During UART mode)
RW
b2 b1 b0
1 0 0 : Transfer data 7 bits long
1 0 1 : Transfer data 8 bits long
1 1 0 : Transfer data 9 bits long
0 0 0 : Serial I/O invalid
0 1 0 : Must not be set
0 1 1 : Must not be set
1 1 1 : Must not be set
CKDIR Internal/external clock
select bit
0 : Internal clock (Note 2) 0 : Internal clock
1 : External clock (Note 3) 1 : External clock (Note 3)
STPS _{Stop bit length select bit Invalid}
0 : One stop bit
1 : Two stop bits
PRY Odd/even parity select bit Invalid
Valid when bit 6 = “1”
0 : Odd parity
1 : Even parity
PRYE _{Parity enable bit}
Invalid
0 : Parity disabled
1 : Parity enabled
IOPOL ^{TxD, RxD I/O polarity}
reverse bit
0 : No reverse
1 : Reverse
Usually set to “0”
0 : No reverse
1 : Reverse
Usually set to “0”
Note 1: Bit 2 to bit 0 are set to “0102” when I²C mode is used.
Note 2: Select CLK output by the corresponding function select registers A, B and C.
Note 3: Set the corresponding function select register A to the I/O port.
Figure 16.6 Serial I/O-related registers (2)
Rev.1.00 Aug. 02, 2005 ^{Page 130} of 329
REJ09B0187-0100