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M16C80 Datasheet, PDF (57/358 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/80 SERIES
M16C/80 Group
8. Clock Generating Circuit
System clock control register 0 (Note 1)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
CM0
Address
000616
When reset
0816
Bit symbol
Bit name
Function
RW
CM00
CM01
Clock output function
select bit (Note 2)
b1 b0
0 0 : I/O port P53
0 1 : fC output (Note 3)
1 0 : f8 output (Note 3)
1 1 : f32 output (Note 3)
CM02
CM03
CM04
WAIT peripheral function
clock stop bit
0 : Do not stop peripheral clock in wait
mode
1 : Stop peripheral clock in wait mode
(Note 10)
XCIN-XCOUT drive capacity 0 : LOW
select bit (Note 4)
1 : HIGH
Port XC select bit
0 : I/O port
1 : XCIN-XCOUT generation (Note 11)
CM05
Main clock (XIN-XOUT)
stop bit (Note 5, 6)
0 : On
1 : Off (Note 7)
CM06
Watchdog timer function
select bit
0 : Watchdog timer interrupt
1 : Reset (Note 8)
CM07
System clock select bit
(Note 9)
0 : XIN, XOUT
1 : XCIN, XCOUT
Note 1: Set bit 0 of the protect register (address 000A16) to “1” before writing to this register.
Note 2: When outputting BCLK (bit 7 of processor mode register 0 is "0"), set these bits to "00". When
outputting ALE to P53 (bit 5 and 4 of processor mode register 0 is "01"), set these bits to "00". The
port P53 function is not selected even when you set "00" in microprocessor or memory expansion
mode and bit 7 of the processor mode register 0 is "1".
Note 3: When selecting fC, f8 or f32 in single chip mode, must use P57 as input port.
Note 4: Changes to “1” when shifting to stop mode or reset.
Note 5: When entering the power saving mode, the main clock is stopped using this bit. To stop the main
clock, set system clock stop bit (CM07) to "1" while an oscillation of sub clock is stable. Then set this
bit to "1".
Note 6: When this bit is "1", XOUT is "H". Also, the internal feedback resistance remains ON, so XIN is pulled
up to XOUT ("H" level) via the feedback resistance.
Note 7: When the main clock is stopped, the main clock division register (address 000C16) is set to the
division by 8 mode.
Note 8: When "1" has been set once, "0" cannot be written by software.
Note 9: To set CM07 "1" from "0", first set CM04 to "1", and an oscillation of sub clock is stable. Then set
CM07. Also, to set CM07 "0" from "1", first set CM05 to "1", and an oscillation of main clock is
stable. Then set CM07. Do not rewrite CM04 and CM05 simultaneously.
Note 10: fc32 is not included.
Note 11: When XcIN-XcOUT is used, set port P86 and P87 to no pull-up resistance with the input port.
System clock control register 1 (Note 1)
b7 b6 b5 b4 b3 b2 b1 b0
00
0000
Symbol
CM1
Address
000716
When reset
2016
Bit symbol
Bit name
CM10
All clock stop control bit
(Note 3)
Reserved bit
CM15
XIN-XOUT drive capacity
select bit (Note 2)
Reserved bit
Function
0 : Clock on
1 : All clocks off (stop mode) (Note 4)
Always set to “0”
RW
Always set to “0”
Note 1: Set bit 0 of the protect register (address 000A16) to “1” before writing to this register.
Note 2: Changes to “1” when shifting from high-speed or middle-speed mode to stop mode or reset.
This bit is remained in low speed or low power dissipation mode.
Note 3: When this bit is "1", XOUT is "H", and the internal feedback resistance is disabled. XCIN and
XCOUT are high-inpedance.
Note 4: When the main clock is stopped, the main clock division register (address 000C16) is set to the
division by 8 mode.
Figure 8.4 System clock control registers 0 and 1
Rev.1.00 Aug. 02, 2005 Page 46 of 329
REJ09B0187-0100