M16C80 Datasheet, PDF (166/358 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/80 SERIES

M16C/80 Group
20. UARTi Special Mode Register (i = 2 to 4)
20. UARTi Special Mode Register (i = 2 to 4)
UART2 to UART4 operate the IIC bus interface (simple IIC bus) using the UARTi special mode register
(addresses 033616, 032616 and 02F616 [i = 2 to 4]) and UARTi special mode register 2 (addresses
033616, 032616 and 02F616 [i = 2 to 4]). UART3 and UART4 add special functions using UARTi special
mode resister 3 (addresses 032516 and 02F516 [i = 3 or 4]).
(1) IIC Bus Interface Mode
The I²C bus interface mode is provided with UART2 to UART4.
Table 20.1 shows the construction of the UARTi special mode register and UARTi special mode register
2.
When the I²C mode select bit (bit 0 in addresses 033716, 032716 and 02F716) is set to “1”, the I²C bus
(simple I²C bus) interface circuit is enabled.
To use the I²C bus, set the SCLi and the SDAi of both master and slave to output with the function select
register. In UART3 and 4, set the data output select bit (bit 5 in address 032C16 and 02FC16) to N-channel
open drain output.
Table 20.1 shows the relationship of the IIC mode select bit to control. To use the chip in the clock
synchronized serial I/O mode or clock asynchronized serial I/O mode, always set this bit to “0”.
Table 20.1 Features in I²C mode
Function
1 Factor of interrupt number 39 to 41 (Note 2)
2 Factor of interrupt number 33, 35, 37 (Note 2)
3 Factor of interrupt number 34, 36, 38 (Note 2)
4 UARTi transmission output delay
Normal mode
Bus collision detection
UARTi transmission
UARTi reception
Not delayed
I²C mode (Note 1)
Start condition detection or stop
condition detection
No acknowledgment detection (NACK)
Acknowledgment detection (ACK)
Delayed
5 P70, P92, P96 at the time when UARTi is in use TxDi (output)
SDAi (input/output) (Note 3)
6 P71, P91, P97 at the time when UARTi is in use RxDi (input)
SCLi (input/output)
7 P72, P90, P95 at the time when UARTi is in use CLKi
8
DMA1 factor at the time when 1 1 0 1 is assigned
to the DMA request factor selection bits
UARTi reception
P72, P90, P95
Acknowledgment detection (ACK)
9 Noise filter width
10 Reading P71, P91, P97
15ns
50ns
Reading the terminal when 0 is Reading the terminal regardless of the
assigned to the direction register value of the direction register
11 Initial value of UARTi output
H level (when 0 is assigned to
the CLK polarity select bit)
The value set in latch P70, P92, P96
when the port is selected (Note 3)
Note 1: Make the settings given below when I²C mode is in use.
Set 0 1 0 in bits 2, 1, 0 of the UARTi transmission/reception mode register.
Disable the RTS/CTS function. Choose the MSB First function.
Note 2: Follow the steps given below to switch from a factor to another.
1. Disable the interrupt of the corresponding number.
2. Switch from a factor to another.
3. Reset the interrupt request flag of the corresponding number.
4. Set an interrupt level of the corresponding number.
Note 3: Set an initial value of SDA transmission output when IIC mode (IIC mode select bit = "1") is valid and serial I/O is invalid.
Rev.1.00 Aug. 02, 2005 ^{Page 155} of 329
REJ09B0187-0100