M16C80 Datasheet, PDF (71/358 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/80 SERIES

M16C/80 Group
9. Interrupt Outline
• Fixed vector tables
The fixed vector table is a table in which addresses are fixed. The vector tables are located in an area
extending from FFFFDC16 to FFFFFF16. One vector table comprises four bytes. Set the first address
of interrupt routine in each vector table. Table 9.1 shows the interrupts assigned to the fixed vector
tables and addresses of vector tables.
Table 9.1 Interrupt factors (fixed interrupt vector addresses)
Interrupt source
Vector table addresses
Remarks
Address (L) to address (H)
Undefined instruction FFFFDC16 to FFFFDF16 Interrupt on UND instruction
Overflow
FFFFE016 to FFFFE316 Interrupt on INTO instruction
BRK instruction
FFFFE416 to FFFFE716 If content of FFFFE716 is filled with FF16, program
execution
starts from the address shown by the vector in the
variable vector table
Address match
FFFFE816 to FFFFEB16 There is an address-matching interrupt enable bit
Watchdog timer
_______
NMI
FFFFF016 to FFFFF316
FFFFF816 to FFFFFB16
_______
External interrupt by input to NMI pin
Reset
FFFFFC16 to FFFFFF16
• Vector table dedicated for emulator
Table 9.2 shows interrupt vector address which is vector table register dedicated for emulator (ad-
dress 00002016 to 00002216). These instructions are not effected with interrupt enable flag (I flag)
(non maskable interrupt).
This interrupt is used exclusively for debugger purposes. You normally do not need to use this inter-
rupt. Do not access to the interrupt vector table register dedicated for emulator (address 00002016 to
00002216).
Table 9.2 Interrupt vector table register for emulator
Interrupt source
Vector table addresses
Address (L) to address (H)
BRK2 instruction
Interrupt vector table register for emulator
00002016 to 00002216
Single step
Interrupt vector table register for emulator
00002016 to 00002216
Remarks
Interrupt for debugger
Interrupt for debugger
• Variable vector tables
The addresses in the variable vector table can be modified, according to the user’s settings. Indicate
the first address using the interrupt table register (INTB). The 256-byte area subsequent to the ad-
dress the INTB indicates becomes the area for the variable vector tables. One vector table comprises
four bytes. Set the first address of the interrupt routine in each vector table. Table 9.3 shows the
interrupts assigned to the variable vector tables and addresses of vector tables.
Set an even address to the start address of vector table setting in INTB so that operating efficiency is
increased.
Rev.1.00 Aug. 02, 2005 ^{Page 60} of 329
REJ09B0187-0100