M16C80 Datasheet, PDF(156/358 Page) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/80 SERIES

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M16C80 Datasheet, PDF (156/358 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/80 SERIES

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M16C/80 Group

18. Clock asynchronous serial I/O (UART) mode

Table 18.2 Specifications of UART Mode (2)

Item

Specification

Error detection

â¢ Overrun error (Note)

This error occurs when the next data is ready before contents of UARTi

receive buffer register are read out

â¢ Framing error

This error occurs when the number of stop bits set is not detected

â¢ Parity error

This error occurs when if parity is enabled, the number of 1âs in parity and

character bits does not match the number of 1âs set

â¢ Error sum flag

This flag is set (= 1) when any of the overrun, framing, and parity errors is

Select function

encountered

_______ _______

â¢ Separate CTS/RTS pins (UART0)

_______

_______

UART0 CTS and RTS pins each can be assigned to separate pins

â¢ Sleep mode selection (UART0, UART1)

This mode is used to transfer data to and from one of multiple slave micro-

computers

â¢ Serial data logic switch (UART2 to UART4)

This function is reversing logic value of transferring data. Start bit, parity bit

and stop bit are not reversed.

â¢ TxD, RxD I/O polarity switch (UART2 to UART4)

This function is reversing TxD port output and RxD port input. All I/O data

level is reversed.

Note: If an overrun error occurs, the UARTi receive buffer will have the next data written in. Note also that

the UARTi receive interrupt request bit will not change.

Rev.1.00 Aug. 02, 2005 Page 145 of 329

REJ09B0187-0100

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