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M16C80 Datasheet, PDF (82/358 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/80 SERIES
M16C/80 Group
9. Interrupt Outline
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9.18 INT Interrupts
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INT0 to INT5 are external input interrupts. The level sense/edge sense switching bits of the interrupt control
register select the input signal level and edge at which the interrupt can be set to occur on input signal level
and input signal edge. The polarity bit selects the polarity.
With the external interrupt input edge sense, the interrupt can be set to occur on both rising and falling
edges by setting the INTi interrupt polarity switch bit of the interrupt request select register (address
031F16) to “1”. When you select both edges, set the polarity switch bit of the corresponding interrupt control
register to the falling edge (“0”).
When you select level sense, the INTi interrupt polarity switch bit of the interrupt request select register
(address 031F16) to “0”.
Figure 9.9 shows the interrupt request select register.
Interrupt request cause select register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
IFSR
Address
031F16
When reset
XX0000002
Bit symbol
IFSR0
Bit name
INT0 interrupt polarity
swiching bit (Note)
Fumction
0 : One edge
1 : Two edges
IFSR1
INT1 interrupt polarity
swiching bit (Note)
0 : One edge
1 : Two edges
IFSR2
IFSR3
INT2 interrupt polarity
swiching bit (Note)
INT3 interrupt polarity
swiching bit (Note)
0 : One edge
1 : Two edges
0 : One edge
1 : Two edges
IFSR4
IFSR5
INT4 interrupt polarity
swiching bit (Note)
INT5 interrupt polarity
swiching bit (Note)
0 : One edge
1 : Two edges
0 : One edge
1 : Two edges
Nothing is assigned.
When write, set "0". When read, their contents are indeterminate.
Note :When level sense is selected, set this bit to "0".
Figure 9.9 Interrupt request cause select register
RW
Rev.1.00 Aug. 02, 2005 Page 71 of 329
REJ09B0187-0100