M16C80 Datasheet, PDF (51/358 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/80 SERIES

M16C/80 Group
7. Bus
Wait control register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
WCR
Address
000816
When reset
FF16
Bit symbol
Bit name
WCR0 External area 0 wait bit
WCR1
WCR2
WCR
External area 1 wait bit
WCR4
WCR5
External area 2 wait bit
WCR6
WCR7
External area 3 wait bit
Function
b1 b0
0 0: Without wait
0 1: With 1 wait
1 0: With 2 wait
1 1: With 3 wait
b3 b2
0 0: Without wait
0 1: With 1 wait
1 0: With 2 wait
1 1: With 3 wait
b5 b4
0 0: Without wait
0 1: With 1 wait
1 0: With 2 wait
1 1: With 3 wait
b7 b6
0 0: Without wait
0 1: With 1 wait
1 0: With 2 wait
1 1: With 3 wait
RW
Note 1: When using the multiplex bus configuration, there are two waits regardless of whether
you have specified "No wait" or "1 wait". However, you can specify "2 wait" or "3 wait".
Note 2: When using the separate bus configuration, the read bus cycle is executed in the
BCLK1 cycle, and the write cycle is executed in the BCLK2 cycle (with 1 wait).
Figure 7.6 Wait control register
Table 7.11 Software waits and bus cycles
Area
Bus status
Internal
memory wait bit
SFR
Internal
0
ROM/RAM
1
External
memory
area
Separate bus
Multiplex bus
External memory
area i wait bit
002
012
102
112
002
012
102
112
Bus cycle
2 BCLK cycles
1 BCLK cycle
2 BCLK cycles
Read :1 BCLK cycle
Write : 2 BCLK cycles
2 BCLK cycles
3 BCLK cycles
4 BCLK cycles
3 BCLK cycle
3 BCLK cycles
3 BCLK cycles
4 BCLK cycles
Rev.1.00 Aug. 02, 2005 ^{Page 40} of 329
REJ09B0187-0100