M16C80 Datasheet, PDF (47/358 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/80 SERIES

M16C/80 Group
7. Bus
(4) ALE signal
The ALE signal latches the address when accessing the multiplex bus space. Latch the address when the
ALE signal falls. The ALE output pin is selected using bits 4 and 5 of the processor mode register 1
(address 000516).
The ALE signal is occurred regardless of internal area and external area.
When BYTE pin = “H”
ALE
D0/A0 to D7/A7
Address
Data (Note 1)
When BYTE pin = “L”
ALE
D0/A0 to D15/A15
Address
Data (Note 1)
A8 to A15
A16 to A19
A20 to A22, A23
Address
Address (Note 2)
Address or CS
A16 to A19
A20 to A22, A23
Address (Note 2)
Address or CS
Note 1: Floating when reading.
Note 2: When full space multiplexed bus is selected, these are I/O ports.
Figure 7.3 ALE signal and address/data bus
(5) Ready signal
The ready signal facilitates access of external devices that require a long time for access. As shown in
________
Figure 7.2, inputting “L” to the RDY pin at the falling edge of BCLK causes the microcomputer to enter the
________
ready state. Inputting “H” to the RDY pin at the falling edge of BCLK cancels the ready state. Table 7.7
_____
shows the microcomputer status in the ready state. Figure 7.4 shows the example of the RD signal being
________
extended using the RDY signal.
Ready is valid when accessing the external area during the bus cycle in which the software wait is ap-
________
plied. When no software wait is operating, the RDY signal is ignored, but even in this case, unused pins
must be pulled up.
Table 7.7 Microcomputer status in ready state (Note)
Item
Status
Oscillation
_____ _____
_____
RD/WR signal, address bus, data bus, CS
__________
ALE signal, HLDA, programmable I/O ports
On
Maintain status when ready signal received
Internal peripheral circuits
On
Note: The ready signal cannot be received immediately prior to a software wait.
Rev.1.00 Aug. 02, 2005 ^{Page 36} of 329
REJ09B0187-0100