M16C80 Datasheet, PDF (105/358 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/80 SERIES

M16C/80 Group
13. Timer A
13. Timer A
Figure 13.1 shows the block diagram of timer A. Figures 13.2 to 13.4 show the timer A-related registers.
Except in event counter mode, timers A0 through A4 all have the same function. Use the timer Ai mode
register (i = 0 to 4) bits 0 and 1 to choose the desired mode.
Timer A has the four operation modes listed as follows:
• Timer mode: The timer counts an internal count source.
• Event counter mode: The timer counts pulses from an external source or a timer over flow.
• One-shot timer mode: The timer stops counting when the count reaches “0000₁₆”.
• Pulse width modulation (PWM) mode: The timer outputs pulses of a given width.
Clock source
selection
f1
f8
f32
fC32
• Timer
• One shot
• PWM
• Timer
(gate function)
Data bus high-order bits
Data bus low-order bits
Low-order
8 bits
Reload register (16)
High-order
8 bits
Polarity
selection
TAiIN
(i = 0 to 4)
• Event counter
Clock selection
TB2 overflow
External
TAj overflow
trigger
(j = i – 1. Note, however, that j = 4 when i = 0)
TAk overflow
(k = i + 1. Note, however, that k = 0 when i = 4)
Count start flag
(Address 034016)
Down count
Up/down flag
(Address 034416)
Counter (16)
Up count/down count
Always down count except
in event counter mode
TAi
Timer A0
Timer A1
Timer A2
Timer A3
Timer A4
Addresses
034716 034616
034916 034816
034B16 034A16
034D16 034C16
034F16 034E16
TAj
Timer A4
Timer A0
Timer A1
Timer A2
Timer A3
TAk
Timer A1
Timer A2
Timer A3
Timer A4
Timer A0
TAiOUT
(i = 0 to 4)
Pulse output
Toggle flip-flop
Figure 13.1 Block diagram of timer A
Timer Ai mode register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
TAiMR(i=0 to 4)
Address
When reset
035616 to 035A16 00000X002
Bit symbol
TMOD0
TMOD1
MR0
Bit name
Operation mode select bit
Function
b1 b0
0 0 : Timer mode
0 1 : Event counter mode
1 0 : One-shot timer mode
1 1 : Pulse width modulation
(PWM) mode
This bit is invalid in M16C/80 series.
Port output control is set by the function select registers A and B.
MR1
Function varies with each operation mode
MR2
MR3
TCK0
TCK1
Count source select bit
(Function varies with each operation mode)
RW
––
Figure 13.2 Timer A-related registers (1)
Rev.1.00 Aug. 02, 2005 ^{Page 94} of 329
REJ09B0187-0100