MC68HC08AZ60A Datasheet, PDF (50/480 Pages) Motorola, Inc – Microcontrollers

Memory Map
2.4 Additional Status and Control Registers
Selected addresses in the range $FE00 to $FFCB contain additional
Status and Control registers as shown in Figure 2-3. A noted exception
is the COP Control Register (COPCTL) at address $FFFF.
Addr.
Register Name
Bit 7
6
5
4
3
2
$FE00
SIM Break Status Register ^Read:
(SBSR) _Write:
R
R
R
R
R
R
Read: POR PIN COP ILOP ILAD
0
$FE01 SIM Reset Status Register (SRSR)
Write:
$FE03
SIM Break Flag Control Register ^Read:
(SBFCR) _Write:
BCFE
R
R
R
R
R
Read: EEDIVCLK 0 EESEC EEMONSEC AZ60A 0
$FE09 Mask Options Register B (MORB)
Write:
1
Bit 0
BW
R
0
LVI
0
R
R
0
0
$FE0C
Break Address Register High ^Read:
(BRKH) _Write:
Bit 15
14
13
12
11
10
9
Bit 8
$FE0D
Break Address Register Low ^Read:
(BRKL) _Write:
Bit 7
6
5
4
3
2
1
Bit 0
$FE0E
Break Status and Control ^Read:
Register (BRKSCR) _Write:
BRKE
BRKA
0
0
0
0
0
0
Read: LVIOUT 0
0
0
0
0
0
0
$FE0F
LVI Status Register (LVISR)
Write:
$FE10
EE1DIV Hi Non-volatile Register
(EE1DIVHNVR)
Read:
Write:
EEDIVSECD
R
R
R
R EEDIV10 EEDIV9 EEDIV8
$FE11
$FE1A
$FE1B
$FE1C
EE1DIV Lo Non-volatile Register _Read:
(EE1DIVLNVR) ^Write:
EEDIV7
EEDIV6
EEDIV5
EEDIV4
EEDIV3
EEDIV2
EEDIV1
EE1DIV Divider High Register
(EE1DIVH)
Read:
Write:
EEDIVSECD
0
0
0
0
EEDIV10 EEDIV9
EE1DIV Divider Low Register _Read:
(EE1DIVL) ^Write:
EEDIV7
EEDIV6
EEDIV5
EEDIV4
EEDIV3
EEDIV2
EEDIV1
EEPROM-1 Nonvolatile Register
(EE1NVR)
Read:
UNUSED UNUSED UNUSED EEPRTCT
Write:
EEBP3
EEBP2
EEBP1
EEDIV0
EEDIV8
EEDIV0
EEBP0
$FE1D
EEPROM-1 Control Register
(EE1CR)
Read:
UNUSED
Write:
0
EEOFF EERAS1 EERAS0 EELAT AUTO EEPGM
$FE1F
EEPROM-1 Array Configuration ^{Read: UNUSED UNUSED UNUSED EEPRTCT EEBP3 EEBP2 EEBP1 EEBP0}
Register (EE1ACR) _Write:
Figure 2-3. Additional Status and Control Registers (Sheet 1 of 2)
Advance Information
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Memory Map
MC68HC08AZ60A — Rev 0.0
MOTOROLA