MC68HC08AZ60A Datasheet, PDF (380/480 Pages) Motorola, Inc – Microcontrollers

MSCAN08 Controller (MSCAN08)
CLKSRC — Clock Source
This flag defines which clock source the MSCAN08 module is driven
from (see Clock System on page 364).
1 = The MSCAN08 clock source is CGMOUT (see Figure 21-7).
0 = The MSCAN08 clock source is CGMXCLK/2 (see Figure 21-7).
NOTE: The CMCR1 register can be written only if the SFTRES bit in the
MSCAN08 module control register is set
21.14.3 MSCAN08 Bus Timing Register 0
Address: $0502
Bit 7
6
5
4
3
2
1
Read:
SJW1
Write:
SJW0
BRP5
BRP4
BRP3
BRP2
BRP1
Reset: 0
0
0
0
0
0
0
Figure 21-17. Bus Timing Register 0 (CBTR0)
Bit 0
BRP0
0
SJW1 and SJW0 — Synchronization Jump Width
The synchronization jump width (SJW) defines the maximum number
of time quanta (T_q) clock cycles by which a bit may be shortened, or
lengthened, to achieve resynchronization on data transitions on the
bus (see Table 21-6).
Table 21-6. Synchronization Jump Width
SJW1
0
0
1
1
SJW0
0
1
0
1
Synchronization Jump Width
1 T_q cycle
2 T_q cycle
3 T_q cycle
4 T_q cycle
Advance Information
380
MSCAN08 Controller (MSCAN08)
MC68HC08AZ60A — Rev 0.0
MOTOROLA