MC68HC08AZ60A Datasheet, PDF (283/480 Pages) Motorola, Inc – Microcontrollers

Timer Interface Module B (TIMB)
Features
PTD4/ATD12/TBCLK
INTERNAL
BUS CLOCK
TCLK
PRESCALER
TSTOP
TRST
16-BIT COUNTER
16-BIT COMPARATOR
TMODH:TMODL
CHANNEL 0
16-BIT COMPARATOR
TCH0H:TCH0L
16-BIT LATCH
CHANNEL 1
16-BIT COMPARATOR
TCH1H:TCH1L
16-BIT LATCH
PRESCALER SELECT
PS2
PS1
PS0
ELS0B ELS0A
CH0F
MS0A
ELS1B ELS1A
MS0B
MS1A
CH1F
TOF
TOIE
TOV0
CH0MAX
CH0IE
TOV1
CH1MAX
CH1IE
Figure 18-1. TIMB Block Diagram
INTER-
RUPT
LOGIC
PTF4
LOGIC
INTER-
RUPT
LOGIC
PTF4/TBCH0
PTF5
LOGIC
INTER-
RUPT
LOGIC
PTF5/TBCH1
Figure 18-2. TIMB I/O Register Summary
Addr.
Register Name
Bit 7
$0040
R: TOF
TIMB Status/Control Register (TBSC)
W: 0
R: Bit 15
$0041 TIMB Counter Register High (TBCNTH)
W: R
R: Bit 7
$0042 TIMB Counter Register Low (TBCNTL)
W: R
$0043
TIMB Counter Modulo Reg. High
(TBMODH)
R:
W:
Bit 15
$0044
TIMB Counter Modulo Reg. Low ^R:
(TBMODL) _W:
Bit 7
$0045
TIMB Ch. 0 Status/Control Register ^{R: CH0F}
(TBSC0) _{W: 0}
$0046
R:
TIMB Ch. 0 Register High (TBCH0H)
Bit 15
W:
6
5
TOIE TSTOP
14
13
R
R
6
5
R
R
14
13
6
5
CH0IE MS0B
14
13
4
0
TRST
12
R
4
R
12
4
MS0A
12
3
2
0
PS2
R
11
10
R
R
3
2
R
R
11
10
3
2
ELS0B ELS0A
11
10
1 Bit 0
PS1 PS0
9
Bit 8
R
R
1
Bit 0
R
R
9
Bit 8
1
Bit 0
TOV0 CH0MAX
9
Bit 8
MC68HC08AZ60A — Rev 0.0
MOTOROLA
Timer Interface Module B (TIMB)
Advance Information
283