MC68HC08AZ60A Datasheet, PDF (307/480 Pages) Motorola, Inc – Microcontrollers

Programmable Interrupt Timer (PIT)
PIT Counter Prescaler
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Read: POF
0
0
PIT Status and Control Register
(PSC)
Write:
0
POIE PSTOP
PRST
PPS2 PPS1 PPS0
Reset: 0
0
1
0
0
0
0
0
Read: Bit 15
14
13
12
11
10
PIT Counter Register High
(PCNTH)
Write:
Reset: 0
0
0
0
0
0
9
Bit 8
0
0
Read: Bit 7
6
5
4
3
2
1
Bit 0
PIT Counter Register Low
(PCNTL)
Write:
Reset: 0
0
0
0
0
0
0
0
Read:
PIT Counter Modulo Register High
(PMODH)
Write:
Bit 15
14
13
12
11
10
Reset: 1
1
1
1
1
1
9
Bit 8
1
1
Read:
PIT Counter Modulo Register Low
(PMODL)
Write:
Bit 7
6
5
4
3
2
1
Bit 0
Reset: 1
1
1
1
1
1
1
1
=Unimplemented
Figure 19-2. PIT I/O Register Summary
Table 19-1. PIT I/O Register Address Summary
Register PSC
Address $004B
PCNTH
$004C
PCNTL PMODH PMODL
$004D $004E $004F
19.5 PIT Counter Prescaler
The clock source can be one of the seven prescaler outputs. The
prescaler generates seven clock rates from the internal bus clock. The
prescaler select bits, PPS[2:0], in the status and control register select
the PIT clock source.
The value in the PIT counter modulo registers and the selected prescaler
output determines the frequency of the periodic interrupt. The PIT
overflow flag (POF) is set when the PIT counter value reaches the
MC68HC08AZ60A — Rev 0.0
MOTOROLA
Programmable Interrupt Timer (PIT)
Advance Information
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