MC68HC08AZ60A Datasheet, PDF (169/480 Pages) Motorola, Inc – Microcontrollers

Mask Options
Functional Description
SSREC — Short Stop Recovery Bit
SSREC enables the CPU to exit stop mode with a delay of 32
CGMXCLK cycles instead of a 4096 CGMXCLK cycle delay.
1 = STOP mode recovery after 32 CGMXCLK cycles
0 = STOP mode recovery after 4096 CGMXCLK cycles
If using an external crystal oscillator, the SSREC bit should not be set.
COPRS — COP Rate Select
COPRS is similar to COPL (please note that the logic is reversed) as
it determines the timeout period for the COP.
1 = COP timeout period is 2¹³ — 2⁴ CGMXCLK cycles.
0 = COP timeout period is 2¹⁸ — 2⁴ CGMXCLK cycles.
STOP — STOP Enable Bit
STOP enables the STOP instruction.
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
COPD — COP Disable Bit
COPD disables the COP module. See Computer Operating
Properly (COP).
1 = COP module disabled
0 = COP module enabled
NOTE:
Extra care should be taken when selecting MOR options since not all
HC08 family devices have the same options. In particular refer to the
appendix on differences of previous versions of MC68HC08AZ60. It is
the user’s responsibility to correctly define the mask option registers.
MC68HC08AZ60A — Rev 0.0
MOTOROLA
Mask Options
Advance Information
169