MC68HC08AZ60A Datasheet, PDF (462/480 Pages) Motorola, Inc – Microcontrollers

MC68HC08AZ60A Changes
to drive the EExDIV clock divider inputs using bit 7 of the new MORB
mask option register $FE09. Next the divide ratio from this source has to
be set by programming an 11-bit time base pre-scalar into bits spread
over two new registers, EExDIVH and EExDIVL (where x=1 or 2 for
EEPROM-1 and EEPROM-2 arrays).
The EExDIVH and EExDIVL registers are volatile. However, they are
loaded upon reset by the contents of duplicate non-volatile
EExDIVHNVR and EExDIVLNVR registers much in the same way as the
array control registers (EExACR) interacts with the non-volatile registers
(EExNVR) for configuration control on the existing revision. As a result
of the new EEDIV clock described above, bit 7 (EEBCLK) of the
EEPROM control registers (EExCR) is no longer used.
26.2.2.3 EEPROM AUTO Programming & Erasing
The second major change to the EEPROM is the inclusion in the
EEPROM control registers (EExCR) of an AUTO function using
previously unused bit 1 of that register.
The AUTO function enables the logic of the MCU to automatically use
the optimum programming or erasing time for the EEPROM. If using
AUTO the user does not need to wait for the normal minimum specified
programming or erasing time. After setting the EEPGM bit as normal the
user just has to poll that bit again, waiting for the MCU to clear it
indicating that programming or erasing is complete.
26.2.3 Mask Option Registers
26.2.3.1 Mask Option Register B
A new mask option register B (MORB) has been introduced for the A-
suffix silicon. This contains two user-selectable bits and one fixed bit.
Bit 3 is a silicon hard set bit, which identifies this new A-suffix silicon.
Bit 4 is a bit that can enable EEPROM-1 and EEPROM-2 read protection
when in monitor mode.
Advance Information
462
MC68HC08AZ60A Changes
MC68HC08AZ60A — Rev 0.0
MOTOROLA