MC68HC08AZ60A Datasheet, PDF (46/480 Pages) Motorola, Inc – Microcontrollers

Memory Map
Addr.
$0010
$0011
$0012
$0013
$0014
$0015
$0016
$0017
$0018
$0019
$001A
$001B
$001C
$001D
$001E
$001F
$0020
$0021
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Read:
SPI Control Register (SPCR)
SPRIE
Write:
R SPMSTR CPOL CPHA SPWOM SPE SPTIE
SPI Status and Control ^{Read: SPRF}
Register (SPSCR) _Write:
OVRF
ERRIE
MODF
SPTE
MODFE
N
SPR1
SPR0
Read: R7
R6
R5
R4
R3
R2
R1
R0
SPI Data Register (SPDR)
Write: T7
T6
T5
T4
T3
T2
T1
T0
Read:
SCI Control Register 1 (SCC1)
LOOPS ENSCI TXINV M WAKE ILTY PEN PTY
Write:
Read:
SCI Control Register 2 (SCC2)
SCTIE TCIE SCRIE ILIE
TE
RE RWU SBK
Write:
Read: R8
SCI Control Register 3 (SCC3)
T8
R
R
ORIE NEIE FEIE PEIE
Write:
Read: SCTE TC SCRF IDLE OR
NF
FE
PE
SCI Status Register 1 (SCS1)
Write:
Read: 0
0
0
0
0
0
BKF RPF
SCI Status Register 2 (SCS2)
Write:
Read: R7
R6
R5
R4
R3
R2
R1
R0
SCI Data Register (SCDR)
Write: T7
T6
T5
T4
T3
T2
T1
T0
Read: 0
SCI Baud Rate Register (SCBR)
Write:
0
SCP1 SCP0
R
SCR2 SCR1 SCR0
IRQ Status and Control ^{Read: 0}
Register (ISCR) _Write:
0
0
0
IRQF
0
IMASK MODE
ACK
Keyboard Status and Control ^{Read: 0}
Register (KBSCR) _Write:
0
0
0
KEYF
0
IMASKK MODEK
ACKK
Read:
PLLF
1
1
1
1
PLL Control Register (PCTL)
PLLIE
PLLON BCS
Write:
PLL Bandwidth Control ^Read:
Register (PBWC) _Write:
AUTO
LOCK
ACQ
XLD
0
0
0
0
PLL Programming Register ^Read:
(PPG) _Write:
MUL7
MUL6
MUL5
MUL4
VRS7
VRS6
VRS5
VRS4
Read: LVISTOP ROMSEC LVIRST LVIPWR SSREC COPRS STOP COPD
Mask Option Register A (MORA)
Write:
Timer A Status and Control ^{Read: TOF}
Register (TASC) _{Write: 0}
0
TOIE TSTOP
TRST
0
R
PS2 PS1 PS0
Keyboard Interrupt Enable ^{Read: 0}
Register (KBIER) _Write:
0
0
KBIE4 KBIE3 KBIE2 KBIE1 KBIE0
Figure 2-2. I/O Data, Status and Control Registers (Sheet 2 of 5)
Advance Information
46
Memory Map
MC68HC08AZ60A — Rev 0.0
MOTOROLA