MC68HC08AZ60A Datasheet, PDF (192/480 Pages) Motorola, Inc – Microcontrollers

Computer Operating Properly (COP)
13.4.3 COPCTL Write
Writing any value to the COP control register (COPCTL) (see COP
Control Register (COPCTL) on page 193), clears the COP counter and
clears bits 12 – 4 of the COP prescaler. Reading the COP control
register returns the reset vector.
13.4.4 Power-On Reset
The power-on reset (POR) circuit clears the COP prescaler 4096
CGMXCLK cycles after power-up.
13.4.5 Internal Reset
An internal reset clears the COP prescaler and the COP counter.
13.4.6 Reset Vector Fetch
A reset vector fetch occurs when the vector address appears on the data
bus. A reset vector fetch clears the COP prescaler.
13.4.7 COPD (COP Disable)
The COPD signal reflects the state of the COP disable bit (COPD) in the
mask option register (MORA). See Mask Options.
13.4.8 COPRS (COP Rate Select)
The COPRS signal reflects the state of the COP rate select bit, COPRS
in the MORA register (see Figure 10-1 on page 168).
Advance Information
192
Computer Operating Properly (COP)
MC68HC08AZ60A — Rev 0.0
MOTOROLA