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MC68HC08AZ60A Datasheet, PDF (207/480 Pages) Motorola, Inc – Microcontrollers | |||
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External Interrupt Module (IRQ)
IRQ Status and Control Register (ISCR)
IRQF â IRQ Flag Bit
This read-only status bit is high when the IRQ interrupt is pending.
1 = IRQ interrupt pending
0 = IRQ interrupt not pending
ACK â IRQ Interrupt Request Acknowledge Bit
Writing a logic â1â to this write-only bit clears the IRQ latch. ACK
always reads as logic â0â. Reset clears ACK.
IMASK â IRQ Interrupt Mask Bit
Writing a logic â1â to this read/write bit disables IRQ interrupt requests.
Reset clears IMASK.
1 = IRQ interrupt requests disabled
0 = IRQ interrupt requests enabled
MODE â IRQ Edge/Level Select Bit
This read/write bit controls the triggering sensitivity of the IRQ pin.
Reset clears MODE.
1 = IRQ interrupt requests on falling edges and low levels
0 = IRQ interrupt requests on falling edges only
MC68HC08AZ60A â Rev 0.0
MOTOROLA
External Interrupt Module (IRQ)
Advance Information
207
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