MC68HC08AZ60A Datasheet, PDF (319/480 Pages) Motorola, Inc – Microcontrollers

I/O Ports
Port A
When bit DDRAx is a logic one, reading address $0000 reads the PTAx
data latch. When bit DDRAx is a logic zero, reading address $0000
reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 20-2 summarizes
the operation of the port A pins.
Table 20-2. Port A pin functions
DDRA Bit
PTA Bit
I/O Pin Mode
Accesses to
DDRA
Read/Write
0
X⁽¹⁾
Input, Hi-Z^{(2) DDRA[7:0]}
1
X
Output
DDRA[7:0]
1. X = don’t care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect input.
Accesses to PTA
Read
Pin
PTA[7:0]
Write
PTA[7:0]⁽³⁾
PTA[7:0]
MC68HC08AZ60A — Rev 0.0
MOTOROLA
I/O Ports
Advance Information
319