MC68HC08AZ60A Datasheet, PDF (406/480 Pages) Motorola, Inc – Microcontrollers

Timer Interface Module A (TIMA)
Figure 23-2. TIMA I/O Register Summary
Addr.
$0020
$0022
$0023
$0024
$0025
$0026
$0027
$0028
$0029
$002A
$002B
$002C
$002D
$002E
$002F
$0030
$0031
Register Name
Bit 7
R: TOF
TIMA Status/Control Register (TASC)
W: 0
R: Bit 15
TIMA Counter Register High (TACNTH)
W: R
R: Bit 7
TIMA Counter Register Low (TACNTL)
W: R
TIMA Counter Modulo Reg. High ^R:
(TAMODH) _W:
Bit 15
TIMA Counter Modulo Reg. Low ^R:
(TAMODL) _W:
Bit 7
TIMA Ch. 0 Status/Control Register ^{R: CH0F}
(TASC0) _{W: 0}
R:
TIMA Ch. 0 Register High (TACH0H)
Bit 15
W:
R:
TIMA Ch. 0 Register Low (TACH0L)
Bit 7
W:
TIMA Ch. 1 Status/Control Register ^{R: CH1F}
(TASC1) _{W: 0}
R:
TIMA Ch. 1 Register High (TACH1H)
Bit 15
W:
R:
TIMA Ch. 1 Register Low (TACH1L)
Bit 7
W:
TIMA Ch. 2 Status/Control Register ^{R: CH2F}
(TASC2) _{W: 0}
R:
TIMA Ch. 2 Register High (TACH2H)
Bit 15
W:
R:
TIMA Ch. 2 Register Low (TACH2L)
Bit 7
W:
TIMA Ch. 3 Status/Control Register ^{R: CH3F}
(TASC3) _{W: 0}
R:
TIMA Ch. 3 Register High (TACH3H)
Bit 15
W:
R:
TIMA Ch. 3 Register Low (TACH3L)
Bit 7
W:
6
5
TOIE TSTOP
14
13
R
R
6
5
R
R
14
13
6
5
CH0IE MS0B
14
13
6
5
0
CH1IE
R
14
13
6
5
CH2IE MS2B
14
13
6
5
0
CH3IE
R
14
13
6
5
4
0
TRST
12
R
4
R
12
4
MS0A
12
4
MS1A
12
4
MS2A
12
4
MS3A
12
4
3
2
0
PS2
R
11
10
R
R
3
2
R
R
11
10
3
2
ELS0B ELS0A
11
10
3
2
ELS1B ELS1A
11
10
3
2
ELS2B ELS2A
11
10
3
2
ELS3B ELS3A
11
10
3
2
1 Bit 0
PS1 PS0
9
Bit 8
R
R
1
Bit 0
R
R
9
Bit 8
1
Bit 0
TOV0 CH0MAX
9
Bit 8
1
Bit 0
TOV1 CH1MAX
9
Bit 8
1
Bit 0
TOV2 CH2MAX
9
Bit 8
1
Bit 0
TOV3 CH3MAX
9
Bit 8
1
Bit 0
Advance Information
406
Timer Interface Module A (TIMA)
MC68HC08AZ60A — Rev 0.0
MOTOROLA