MC68HC08AZ60A Datasheet, PDF (140/480 Pages) Motorola, Inc – Microcontrollers

Clock Generator Module (CGM)
9.8.1
9.8.2
Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
9.9 CGM During Break Interrupts . . . . . . . . . . . . . . . . . . . . . . . 160
9.10 Acquisition/Lock Time Specifications . . . . . . . . . . . . . . . . 160
9.10.1 Acquisition/Lock Time Definitions . . . . . . . . . . . . . . . . . 160
9.10.2 Parametric Influences on Reaction Time . . . . . . . . . . . . 162
9.10.3 Choosing a Filter Capacitor . . . . . . . . . . . . . . . . . . . . . . 163
9.10.4 Reaction Time Calculation . . . . . . . . . . . . . . . . . . . . . . . 163
9.2 Introduction
The CGM generates the crystal clock signal, CGMXCLK, which operates
at the frequency of the crystal. The CGM also generates the base clock
signal, CGMOUT, from which the system clocks are derived. CGMOUT
is based on either the crystal clock divided by two or the phase-locked
loop (PLL) clock, CGMVCLK, divided by two. The PLL is a frequency
generator designed for use with 1-MHz to 16-MHz crystals or ceramic
resonators. The PLL can generate an 8-MHz bus frequency without
using high frequency crystals.
9.3 Features
Features of the CGM include:
• Phase-Locked Loop with Output Frequency in Integer Multiples of
the Crystal Reference
• Programmable Hardware Voltage-Controlled Oscillator (VCO) for
Low-Jitter Operation
• Automatic Bandwidth Control Mode for Low-Jitter Operation
• Automatic Frequency Lock Detector
• CPU Interrupt on Entry or Exit from Locked Condition
Advance Information
140
Clock Generator Module (CGM)
MC68HC08AZ60A — Rev 0.0
MOTOROLA