MC68HC08AZ60A Datasheet, PDF (284/480 Pages) Motorola, Inc – Microcontrollers

Timer Interface Module B (TIMB)
Addr.
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Figure 18-2. TIMB I/O Register Summary
Register Name
Bit 7 6
5
4
3
2
1 Bit 0
R:
TIMB Ch. 0 Register Low (TBCH0L)
Bit 7
6
5
4
3
2
1
Bit 0
W:
TIMB Ch. 1 Status/Control Register ^{R: CH1F}
(TBSC1) _{W: 0}
CH1IE
0
R
MS1A ELS1B ELS1A TOV1 CH1MAX
R:
TIMB Ch. 1 Register High (TBCH1H)
Bit 15 14
13
12
11
10
W:
9
Bit 8
R:
TIMB Ch. 1 Register Low (TBCH1L)
Bit 7
6
5
4
3
2
1
Bit 0
W:
R = Reserved
18.4 Functional Description
Figure 18-1 shows the TIMB structure. The central component of the
TIMB is the 16-bit TIMB counter that can operate as a free-running
counter or a modulo up-counter. The TIMB counter provides the timing
reference for the input capture and output compare functions. The TIMB
counter modulo registers, TBMODH–TBMODL, control the modulo
value of the TIMB counter. Software can read the TIMB counter value at
any time without affecting the counting sequence.
The two TIMB channels are programmable independently as input
capture or output compare channels.
18.4.1 TIMB Counter Prescaler
The TIMB clock source can be one of the seven prescaler outputs or the
TIMB clock pin, PTD4/ATD12/TBCLK. The prescaler generates seven
clock rates from the internal bus clock. The prescaler select bits, PS[2:0],
in the TIMB status and control register select the TIMB clock source.
Advance Information
284
Timer Interface Module B (TIMB)
MC68HC08AZ60A — Rev 0.0
MOTOROLA