MC68HC08AZ60A Datasheet, PDF (299/480 Pages) Motorola, Inc – Microcontrollers

Timer Interface Module B (TIMB)
I/O Registers
18.9.4 TIMB Channel Status and Control Registers
Each of the TIMB channel status and control registers:
• Flags input captures and output compares
• Enables input capture and output compare interrupts
• Selects input capture, output compare or PWM operation
• Selects high, low or toggling output on output compare
• Selects rising edge, falling edge or any edge as the active input
capture trigger
• Selects output toggling on TIMB overflow
• Selects 0% and 100% PWM duty cycle
• Selects buffered or unbuffered output compare/PWM operation
Register Name and Address TBSC0 — $0045
Bit 7
6
5
4
Read: CH0F
Write: 0
CH0IE
MS0B
MS0A
Reset: 0
0
0
0
3
ELS0B
0
2
ELS0A
0
1
Bit 0
TOV0 CH0MAX
0
0
Register Name and Address TBSC1 — $0048
Bit 7
6
5
4
3
2
1
Bit 0
Read: CH1F
0
CH1IE
MS1A ELS1B ELS1A TOV1 CH1MAX
Write: 0
R
Reset: 0
0
0
0
0
0
0
0
R R = Reserved
Figure 18-7. TIMB Channel Status and Control Registers
(TBSC0–TBSC1)
MC68HC08AZ60A — Rev 0.0
MOTOROLA
Timer Interface Module B (TIMB)
Advance Information
299