MC68HC08AZ60A Datasheet, PDF (110/480 Pages) Motorola, Inc – Microcontrollers

Central Processor Unit (CPU)
Table 7-1. Instruction Set Summary (Continued)
Source
Form
Operation
BSR rel
Branch to Subroutine
CBEQ opr,rel
CBEQA
#opr,rel
CBEQX
#opr,rel
CBEQ
opr,X+,rel
CBEQ X+,rel
CBEQ
opr,SP,rel
CLC
CLI
CLR opr
CLRA
CLRX
CLRH
CLR opr,X
CLR ,X
CLR opr,SP
Compare and Branch if Equal
Clear Carry Bit
Clear Interrupt Mask
Clear
CMP #opr
CMP opr
CMP opr
CMP opr,X
CMP opr,X
CMP ,X
CMP opr,SP
CMP opr,SP
Compare A with M
COM opr
COMA
COMX
COM opr,X
COM ,X
COM opr,SP
Complement (One’s
Complement)
CPHX #opr
CPHX opr
Compare H:X with M
CPX #opr
CPX opr
CPX opr
CPX ,X
CPX opr,X
CPX opr,X
CPX opr,SP
CPX opr,SP
Compare X with M
Description
PC ← (PC) + 2; push (PCL)
SP ← (SP) – 1; push (PCH)
SP ← (SP) – 1
PC ← (PC) + rel
Effect on
CCR
VHI NZ C
– – – – – – REL AD rr 4
PC ← (PC) + 3 + rel ? (A) – (M) = $00
PC ← (PC) + 3 + rel ? (A) – (M) = $00
PC ← (PC) + 3 + rel ? (X) – (M) = $00
PC ← (PC) + 3 + rel ? (A) – (M) = $00
PC ← (PC) + 2 + rel ? (A) – (M) = $00
PC ← (PC) + 4 + rel ? (A) – (M) = $00
DIR
IMM
–
–
–
–
–
–
IMM
IX1+
IX+
SP1
31
41
51
61
71
9E
61
dd
rr
ii rr
ii rr
ff rr
rr
ff rr
5
4
4
5
4
6
C←0
I←0
M ← $00
A ← $00
X ← $00
H ← $00
M ← $00
M ← $00
M ← $00
(A) – (M)
M ← (M) = $FF – (M)
A ← (A) = $FF – (M)
X ← (X) = $FF – (M)
M ← (M) = $FF – (M)
M ← (M) = $FF – (M)
M ← (M) = $FF – (M)
(H:X) – (M:M + 1)
(X) – (M)
– – – – – 0 INH
– – 0 – – – INH
DIR
INH
INH
0 – – 0 1 – INH
IX1
IX
SP1
IMM
DIR
EXT
↕
–
–
↕
↕
↕
IX2
IX1
IX
SP1
SP2
DIR
INH
0
–
–
↕
↕
1
INH
IX1
IX
SP1
↕
–
–
↕
↕
↕
IMM
DIR
IMM
DIR
EXT
↕
–
–
↕
↕
↕
IX2
IX1
IX
SP1
SP2
98
1
9A
2
3F
4F
dd
5F
8C
6F
7F
ff
9E
6F
ff
3
1
1
1
3
2
4
A1
B1
C1
D1
E1
F1
9E
ii
dd
hh
ll
ee
ff
ff
2
3
4
4
3
2
E1
9E
D1
ff
ee
ff
4
5
33
43
dd
53
63
73
ff
9E
63
ff
4
1
1
4
3
5
65
75
ii
ii+1
dd
3
4
A3
B3
C3
D3
E3
F3
9E
ii
dd
hh
ll
ee
ff
ff
2
3
4
4
3
2
E3
9E
D3
ff
ee
ff
4
5
Advance Information
110
Central Processor Unit (CPU)
MC68HC08AZ60A — Rev 0.0
MOTOROLA