MC68HC08AZ60A Datasheet, PDF (260/480 Pages) Motorola, Inc – Microcontrollers

Serial Peripheral Interface (SPI)
BUS
CLOCK
WRITE
TO SPDR
INITIATION DELAY
MOSI
SCK
(CPHA = ‘1’)
SCK
(CPHA =’0’)
SCK CYCLE
NUMBER
MSB
BIT 6
BIT 5
1
2
3
INITIATION DELAY FROM WRITE SPDR TO TRANSFER BEGIN
BUS
CLOCK
WRITE
TO SPDR
BUS
CLOCK
EARLIEST LATEST
WRITE
TO SPDR
(SCK = INTERNAL CLOCK ÷ 2;
2 POSSIBLE START POINTS)
BUS
CLOCK
EARLIEST
WRITE
TO SPDR
(SCK = INTERNAL CLOCK ÷ 8;
8 POSSIBLE START POINTS)
LATEST
BUS
CLOCK
EARLIEST
WRITE
TO SPDR
(SCK = INTERNAL CLOCK ÷ 32;
32 POSSIBLE START POINTS)
LATEST
EARLIEST
(SCK = INTERNAL CLOCK ÷ 128;
128 POSSIBLE START POINTS)
LATEST
Figure 17-6. Transmission Start Delay (Master)
Advance Information
260
Serial Peripheral Interface (SPI)
MC68HC08AZ60A — Rev 0.0
MOTOROLA