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MC68HC08AZ60A Datasheet, PDF (353/480 Pages) Motorola, Inc – Microcontrollers
MSCAN08 Controller (MSCAN08)
Identifier Acceptance Filter
• Single identifier acceptance filter, each to be applied to a) the full
29 bits of the extended identifier and to the following bits of the
CAN frame: RTR, IDE, SRR or b) the 11 bits of the standard
identifier plus the RTR and IDE bits of CAN 2.0A/B messages.
This mode implements a single filter for a full length CAN 2.0B
compliant extended identifier. Figure 21-3 shows how the 32-bit
filter bank (CIDAR0-3, CIDMR0-3) produces a filter 0 hit.
• Two identifier acceptance filters, each to be applied to a) the 14
most significant bits of the extended identifier plus the SRR and
the IDE bits of CAN2.0B messages, or b) the 11 bits of the
identifier plus the RTR and IDE bits of CAN 2.0A/B messages.
Figure 21-4 shows how the 32-bit filter bank (CIDAR0-3,
CIDMR0-3) produces filter 0 and 1 hits.
• Four identifier acceptance filters, each to be applied to the first
eight bits of the identifier. This mode implements four independent
filters for the first eight bits of a CAN 2.0A/B compliant standard
identifier. Figure 21-5 shows how the 32-bit filter bank (CIDAR0-
3, CIDMR0-3) produces filter 0 to 3 hits.
• Closed filter. No CAN message will be copied into the foreground
buffer RxFG, and the RXF flag will never be set.
ID28 IDR0 ID21 ID20 IDR1 ID15 ID14 IDR2
ID10 IDR0
ID3 ID2
IDR1 IDE ID10 IDR2
ID7 ID6
IDR3 RTR
ID3 ID10 IDR3
ID3
AM7 CIDMR0 AM0 AM7 CIDMR1 AM0 AM7 CIDMR2 AM0 AM7 CIDMR3 AM0
AC7 CIDAR0 AC0 AC7 CIDAR1 AC0 AC7 CIDAR2 AC0 AC7 CIDAR3 AC0
ID Accepted (Filter 0 Hit)
Figure 21-3. Single 32-Bit Maskable Identifier Acceptance Filter
MC68HC08AZ60A — Rev 0.0
MOTOROLA
MSCAN08 Controller (MSCAN08)
Advance Information
353