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MC68HC08AZ60A Datasheet, PDF (164/480 Pages) Motorola, Inc – Microcontrollers
Clock Generator Module (CGM)
• Correct selection of filter capacitor, CF (see Choosing a Filter
Capacitor on page 163).
• Room temperature operation
• Negligible external leakage on CGMXFC
• Negligible noise
The K factor in the equations is derived from internal PLL parameters.
Kacq is the K factor when the PLL is configured in acquisition mode, and
Ktrk is the K factor when the PLL is configured in tracking mode. (See
Acquisition and Tracking Modes on page 145).
tacq
=


f--C---VG----MD---DR--A-D---V-


K-----A8---C---Q-
tal
=


f--C---VG----MD---DR--A-D---V-


-K----T4--R---K-
tLock = tACQ + tAL
Note the inverse proportionality between the lock time and the reference
frequency.
In automatic bandwidth control mode, the acquisition and lock times are
quantized into units based on the reference frequency. (See Manual
and Automatic PLL Bandwidth Modes on page 145). A certain
number of clock cycles, nACQ, is required to ascertain that the PLL is
within the tracking mode entry tolerance, ∆TRK, before exiting acquisition
mode. A certain number of clock cycles, nTRK, is required to ascertain
that the PLL is within the lock mode entry tolerance, ∆Lock. Therefore, the
acquisition time, tACQ, is an integer multiple of nACQ/fCGMRDV, and the
acquisition to lock time, tAL, is an integer multiple of nTRK/fCGMRDV. Also,
since the average frequency over the entire measurement period must
be within the specified tolerance, the total time usually is longer than
tLock as calculated above.
Advance Information
164
Clock Generator Module (CGM)
MC68HC08AZ60A — Rev 0.0
MOTOROLA