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MC68HC08AZ60A Datasheet, PDF (469/480 Pages) Motorola, Inc – Microcontrollers | |||
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Advance Information â MC68HC08AZ60A
Glossary
A â See âaccumulator (A).â
accumulator (A) â An 8-bit general-purpose register in the CPU08. The CPU08 uses the
accumulator to hold operands and results of arithmetic and logic operations.
acquisition mode â A mode of PLL operation during startup before the PLL locks on a
frequency. Also see "tracking mode."
address bus â The set of wires that the CPU or DMA uses to read and write memory locations.
addressing mode â The way that the CPU determines the operand address for an instruction.
The M68HC08 CPU has 16 addressing modes.
ALU â See âarithmetic logic unit (ALU).â
arithmetic logic unit (ALU) â The portion of the CPU that contains the logic circuitry to perform
arithmetic, logic, and manipulation operations on operands.
asynchronous â Refers to logic circuits and operations that are not synchronized by a common
reference signal.
baud rate â The total number of bits transmitted per unit of time.
BCD â See âbinary-coded decimal (BCD).â
binary â Relating to the base 2 number system.
binary number system â The base 2 number system, having two digits, 0 and 1. Binary
arithmetic is convenient in digital circuit design because digital circuits have two
permissible voltage levels, low and high. The binary digits 0 and 1 can be interpreted to
correspond to the two digital voltage levels.
binary-coded decimal (BCD) â A notation that uses 4-bit binary numbers to represent the 10
decimal digits and that retains the same positional structure of a decimal number. For
example,
234 (decimal) = 0010 0011 0100 (BCD)
bit â A binary digit. A bit has a value of either logic 0 or logic 1.
MC68HC08AZ60A â Rev 0.0
MOTOROLA
Glossary
Advance Information
469
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