MC68HC08AZ60A Datasheet, PDF (190/480 Pages) Motorola, Inc – Microcontrollers

Computer Operating Properly (COP)
13.3 Functional Description
Figure 13-1 shows the structure of the COP module.
CGMXCLK
12-BIT COP PRESCALER
STOP INSTRUCTION
INTERNAL RESET SOURCES
RESET VECTOR FETCH
COPCTL WRITE
COPD FROM MORA
RESET
COPCTL WRITE
COPRS FROM MORA
6-BIT COP COUNTER
CLEAR COP
COUNTER
RESET
RESET STATUS
REGISTER
Figure 13-1. COP Block Diagram
Table 13-1. COP I/O Register Summary
Register Name
Bit 7 6
5
4
3
2
COP Control Register (COPCTL)
1 Bit 0 Addr.
$FFFF
Advance Information
190
The COP counter is a free-running 6-bit counter preceded by a12-bit
prescaler. If not cleared by software, the COP counter overflows and
generates an asynchronous reset after 2¹³ – 2⁴, or 2¹⁸ – 2⁴ CGMXCLK
cycles, depending on the state of the COP rate select bit, COPRS in
Computer Operating Properly (COP)
MC68HC08AZ60A — Rev 0.0
MOTOROLA