MC68HC08AZ60A Datasheet, PDF (339/480 Pages) Motorola, Inc – Microcontrollers

I/O Ports
Port G
When bit DDRGx is a logic one, reading address $000A reads the PTGx
data latch. When bit DDRGx is a logic zero, reading address $000A
reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data. Table 20-8 summarises the operation
of the port G pins.
Table 20-8. Port G Pin Functions
DDRG Bit
PTG Bit
I/O Pin Mode
Accesses to
DDRG
Read/Write
0
X⁽¹⁾
Input, Hi-Z^{(2) DDRG[2:0]}
1
X
Output
DDRG[2:0]
1. X = don’t care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect input.
Accesses to PTG
Read
Pin
PTG[2:0]
Write
PTG[2:0]⁽³⁾
PTG[2:0]
MC68HC08AZ60A — Rev 0.0
MOTOROLA
I/O Ports
Advance Information
339