MC68HC08AZ60A Datasheet, PDF (132/480 Pages) Motorola, Inc – Microcontrollers

System Integration Module (SIM)
IAB
WAIT ADDR
WAIT ADDR + 1
SAME
SAME
IDB
PREVIOUS DATA NEXT OPCODE
SAME
SAME
R/W
NOTE: Previous data can be operand data or the WAIT opcode, depending on the
last instruction.
Figure 8-10. WAIT Mode Entry Timing
Figure 8-10 and Figure 8-12 show the timing for WAIT recovery.
IAB
$6E0B
$6E0C $00FF $00FE $00FD $00FC
IDB $A6 $A6
$A6
$01
$0B
$6E
EXITSTOPWAIT
NOTE: EXITSTOPWAIT = RST pin OR CPU interrupt OR break interrupt
Figure 8-11. WAIT Recovery From Interrupt or Break
IAB
$6E0B
32
Cycles
32
Cycles
RSTVCTH RSTVCTL
IDB $A6 $A6
$A6
RST
CGMXCLK
Figure 8-12. WAIT Recovery From Internal Reset
Advance Information
132
System Integration Module (SIM)
MC68HC08AZ60A — Rev 0.0
MOTOROLA