MC68HC08AZ60A Datasheet, PDF (286/480 Pages) Motorola, Inc – Microcontrollers

Timer Interface Module B (TIMB)
(edge), use the input capture function to record the time at which the
edge occurred. A number corresponding to the desired delay is added to
this captured value and stored to an output compare register (see TIMB
Channel Registers on page 303). Because both input captures and
output compares are referenced to the same 16-bit modulo counter, the
delay can be controlled to the resolution of the counter independent of
software latencies.
Reset does not affect the contents of the input capture channel register
(TBCHxH–TBCHxL).
18.4.3 Output Compare
With the output compare function, the TIMB can generate a periodic
pulse with a programmable polarity, duration and frequency. When the
counter reaches the value in the registers of an output compare channel,
the TIMB can set, clear or toggle the channel pin. Output compares can
generate TIMB CPU interrupt requests.
18.4.3.1 Unbuffered Output Compare
Any output compare channel can generate unbuffered output compare
pulses as described in Output Compare on page 286. The pulses are
unbuffered because changing the output compare value requires writing
the new value over the old value currently in the TIMB channel registers.
An unsynchronized write to the TIMB channel registers to change an
output compare value could cause incorrect operation for up to two
counter overflow periods. For example, writing a new value before the
counter reaches the old value but after the counter reaches the new
value prevents any compare during that counter overflow period. Also,
using a TIMB overflow interrupt routine to write a new, smaller output
compare value may cause the compare to be missed. The TIMB may
pass the new value before it is written.
Use the following methods to synchronize unbuffered changes in the
output compare value on channel x:
Advance Information
286
Timer Interface Module B (TIMB)
MC68HC08AZ60A — Rev 0.0
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