MC68HC08AZ60A Datasheet, PDF (385/480 Pages) Motorola, Inc – Microcontrollers

MSCAN08 Controller (MSCAN08)
Programmer’s Model of Control Registers
OVRIF — Overrun Interrupt Flag
This flag is set when a data overrun condition occurs. If not masked,
an error interrupt is pending while this flag is set.
1 = A data overrun has been detected since last clearing the flag.
0 = No data overrun has occurred.
RXF — Receive Buffer Full
The RXF flag is set by the MSCAN08 when a new message is
available in the foreground receive buffer. This flag indicates whether
the buffer is loaded with a correctly received message. After the CPU
has read that message from the receive buffer the RXF flag must be
cleared to release the buffer. A set RXF flag prohibits the exchange
of the background receive buffer into the foreground buffer. If not
masked, a receive interrupt is pending while this flag is set.
1 = The receive buffer is full. A new message is available.
0 = The receive buffer is released (not full).
NOTE: To ensure data integrity, no registers of the receive buffer shall be read
while the RXF flag is cleared.
NOTE: The CRFLG register is held in the reset state when the SFTRES bit in
CMCR0 is set.
21.14.6 MSCAN08 Receiver Interrupt Enable Register
Address: $0505
Bit 7
6
5
4
3
2
1
Bit 0
Read:
WUPIE RWRNIE TWRNIE RERRIE TERRIE BOFFIE
Write:
OVRIE
RXFIE
Reset: 0
0
0
0
0
0
0
0
Figure 21-20. Receiver Interrupt Enable Register (CRIER)
WUPIE — Wakeup Interrupt Enable
1 = A wakeup event will result in a wakeup interrupt.
0 = No interrupt will be generated from this event.
MC68HC08AZ60A — Rev 0.0
MOTOROLA
MSCAN08 Controller (MSCAN08)
Advance Information
385