MC68HC08AS32 Datasheet, PDF (98/280 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

5.4.3 External Filter Capacitor Pin (CGMXFC)
The CGMXFC pin is required by the loop filter to filter out phase corrections. A
small external capacitor is connected to this pin.
NOTE:
To prevent noise problems, C_F should be placed as close to the CGMXFC pin as
possible, with minimum routing distances and no routing of other signals across the
C_F connection.
5.4.4 Analog Power Pin (V_DDA/V_DDAREF)
V_DDA/V_DDAREF is a power pin used by the analog portions of the PLL. Connect the
V_DDA/V_DDAREF pin to the same voltage potential as the V_DD pin.
NOTE: Route V_DDA/V_DDAREF carefully for maximum noise immunity and place bypass
capacitors as close as possible to the package.
5.4.5 Oscillator Enable Signal (SIMOSCEN)
The SIMOSCEN signal comes from the system integration module (SIM) and
enables the oscillator and PLL.
5.4.6 Crystal Output Frequency Signal (CGMXCLK)
CGMXCLK is the crystal oscillator output signal. It runs at the full speed of the
crystal, f_XCLK, and comes directly from the crystal oscillator circuit. Figure 5-3
shows only the logical relation of CGMXCLK to OSC1 and OSC2 and may not
represent the actual circuitry. The duty cycle of CGMXCLK is unknown and may
depend on the crystal and other external factors. Also, the frequency and amplitude
of CGMXCLK can be unstable at startup.
5.4.7 CGM Base Clock Output (CGMOUT)
CGMOUT is the clock output of the CGM. This signal goes to the SIM, which
generates the MCU clocks. CGMOUT is a 50% duty cycle clock running at twice
the bus frequency. CGMOUT is software programmable to be either the oscillator
output, CGMXCLK, divided by two or the VCO clock, CGMVCLK, divided by two.
5.4.8 CGM CPU Interrupt (CGMINT)
CGMINT is the interrupt signal generated by the PLL lock detector.
Data Sheet
98
MC68HC08AS32 — Rev. 4.1
Freescale Semiconductor