MC68HC08AS32 Datasheet, PDF (145/280 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

11.4.2 Data Direction Register C
Data direction register C determines whether each port C pin is an input or an
output. Writing a logic 1 to a DDRC bit enables the output buffer for the
corresponding port C pin; a logic 0 disables the output buffer.
Address: $0006
Bit 7
6
5
Read:
Write:
MCLKEN
0
R
0
R
Reset:
0
0
0
R
= Reserved
4
DDRC4
0
3
DDRC3
0
2
DDRC2
0
1
DDRC1
0
Figure 11-9. Data Direction Register C (DDRC)
Bit 0
DDRC0
0
NOTE:
MCLKEN — MCLK Enable Bit
This read/write bit enables MCLK to be an output signal on PTC2. If MCLK is
enabled, PTC2 is under the control of MCLKEN. Reset clears this bit.
1 = MCLK output enabled
0 = MCLK output disabled
DDRC[4:0] — Data Direction Register C Bits
These read/write bits control port C data direction. Reset clears DDRC[7:0],
configuring all port C pins as inputs.
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
Avoid glitches on port C pins by writing to the port C data register before changing
data direction register C bits from 0 to 1.
Figure 11-10 shows the port C I/O logic.
READ DDRC ($0006)
WRITE DDRC ($0006)
RESET
WRITE PTC ($0002)
DDRCx
PTCx
PTCx
READ PTC ($0002)
Figure 11-10. Port C I/O Circuit
MC68HC08AS32 — Rev. 4.1
Freescale Semiconductor
Data Sheet
145