MC68HC08AS32 Datasheet, PDF (37/280 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

2.5.1 Functional Description
Addresses $0800–$09FF are EEPROM locations. The 512 bytes of EEPROM can
be programmed or erased without an external voltage supply. The EEPROM has
a lifetime of 10,000 write-erase cycles in the non-redundant mode. Reliability (data
retention) is further extended if the redundancy option is selected. EEPROM cells
are protected with a non-volatile, 128-byte, block protection option. These options
are stored in the EEPROM non-volatile register (EENVR) and are loaded into the
EEPROM array configuration register (EEACR) after reset or a read of EENVR.
The EEPROM array also can be disabled to reduce current.
2.5.1.1 EEPROM Programming
The unprogrammed state is a logic 1. Programming changes the state to a logic 0.
Only valid EEPROM bytes in the non-protected blocks and EENVR can be
programmed. When the array is configured in the redundant mode, programming
the first 256 bytes ($0800–$08FF) will also program the last 256 bytes
($0900–$09FF) with the same data. Programming the EEPROM in the
non-redundant mode is recommended. Program the data to both locations before
entering the redundant mode.
Follow this procedure to program a byte of EEPROM. Refer to 17.4 5.0-Volt DC
Electrical Characteristics for timing values.
1. Clear EERAS1 and EERAS0 and set EELAT in the EECR ($FE1D). Set
value of t_EEPGM. (See Notes a and b.)
2. Write the desired data to any user EEPROM address.
3. Set the EEPGM bit. (See Note c.)
4. Wait for a time, t_EEPGM, to program the byte.
5. Clear the EEPGM bit.
6. Wait for the programming voltage time to fall, t_EEFPV.
7. Clear EELAT bits. (See Note d.)
8. Repeat steps 1 through 7 for more EEPROM programming.
NOTES:
a. EERAS1 and EERAS0 must be cleared for programming. Otherwise,
you will be in erase mode.
b. Setting the EELAT bit configures the address and data buses to latch
data for programming the array. Only data with a valid EEPROM
address will be latched. If another consecutive valid EEPROM write
occurs, this address and data will override the previous address and
data. Any attempts to read other EEPROM data will read the latched
data. If EELAT is set, other writes to the EECR will be allowed after a
valid EEPROM write.
c. The EEPGM bit cannot be set if the EELAT bit is cleared and a
non-EEPROM write has occurred. This is to ensure proper
programming sequence. When EEPGM is set, the on-board charge
MC68HC08AS32 — Rev. 4.1
Freescale Semiconductor
Data Sheet
37